PIC MCU interrupt
Hej allesammen. Jeg forsøger at lave et interrupt via TMR0 på min pic18f14k50 MCU. Jeg har tilsluttet et 7-segment display og vil have det til at tælle med 1 sekunds interval. Med konfigurationen nedenfor kommer der ikke noget som helst på displayet. Ændrer jeg while(i<=ms) til if(i<=ms) får jeg et 8-tal (sikkert et meget hurtigt count). Jeg har kæmpet i laaang tid med det nu.PS. bruger jeg en counter til hver cyclus og dropper TMR0 virker displayet/tælleren fint.
//////// 7 Segment display counter ///////////////
/*
* File: newmain.c
* Author: Tommy
*
* Created on 24. januar 2018, 13:45
*/
#include <xc.h>
// BEGIN CONFIG
#pragma config CPUDIV = NOCLKDIV // No CPU system clock divider.
#pragma config USBDIV = OFF //USB clock not divided.
#pragma config FOSC = IRC //Internal oscillator enabled
#pragma config PLLEN = OFF //No osc multiplier
#pragma config PCLKEN = ON //Primary clock enabled
#pragma config FCMEN = OFF //Fail safe monitor disabled.
#pragma config IESO = OFF //Osc switch-over bit (What is this?))
#pragma config PWRTEN = OFF //72ms startup delay. (Auto-enables LP oscillator))
#pragma config BOREN = OFF // Brown-out Reset Enable bit.
#pragma config BORV = 30 //VBOR set to 3.0V nominal when enabled.
#pragma config WDTEN = OFF // Watchdog OFF
#pragma config WDTPS = 1 //Watchdog postscale 1:1
#pragma config HFOFST = ON //System clock is held off until HFINTOSC is stable.
#pragma config MCLRE = ON //MCLR button is enabled.
#pragma config STVREN = ON //Overflow/underflow will cause reset.
#pragma config LVP = OFF //Single supply ICSP disabled.
#pragma config BBSIZ = OFF //set to 1kW boot block size (What is this?)
#pragma config XINST = OFF //Extended instruction disabled (What is this?)
#pragma config DEBUG = OFF //Background debugger disabled.
//// Time delay ms ////
void delay_ms(unsigned int ms) {
OSCCON = 0b01110100; //SLEEP mode,16MHz,internal osc,stable HFINTOSC, Primary clk.
T0CON = 0b11100011; // TMR0 ON,8bit,internal cycle clk,low-high inc, prescale assigned, 1:16 prescale
INTCONbits.TMR0IF = 0; //Clearing TMR0 overflow flag
INTCONbits.TMR0IE = 1; //Enable TMR0 owerflow interrupt
INTCONbits.PEIE = 1; //Enables all unmasked interrupts.
INTCON2bits.TMR0IP = 1; //High priority TMR0 interrupt
RCONbits.IPEN = 1; //Enable priority levels on interrupts.
INTCONbits.GIE = 1; //Enables global interrupts
int i = 0; //Counter.
while (i<=ms){
TMR0 = 0x07; //250 ticks giving a timelapse of 1 ms, two ticks are lost when TMR0 reset.
// Ex: Fosc/4 = Oscillator/4 = 16MHz/4 = 4MHz.
// 1/((Fosc/4)/prescaler) = 1/(4MHz/16) = 0,000004 seconds = 4us pr tick.
// 0,001s / 0,000004s = 250 ticks pr. ms.
//Max count 8bit = 255 + 2 lost in reset = start at 7 ticks.
if(INTCONbits.TMR0IF == 1){ // If interrupt flag set
i++; //Increment i with 1.
INTCONbits.TMR0IF = 0; //Remove flag and start over again from 7 ticks.
}}}
int main(int argc, char** argv) {
TRISA = 0b00000000;
LATA = 0b00000000;
TRISB = 0b00000000;
LATB = 0b00000000;
TRISC = 0b00000000;
LATC = 0b00000000;
//IO Ports
TRISCbits.TRISC0 = 0; //Segment a
TRISCbits.TRISC1 = 0; //Segment b
TRISCbits.TRISC2 = 0; //Segment c
TRISBbits.TRISB4 = 0; //Segment d
TRISCbits.TRISC4 = 0; //Segment e
TRISCbits.TRISC5 = 0; //Segment f
TRISBbits.TRISB5 = 0; //Segment g
int DispCounter = 0;
while (1) {
DispCounter++;
delay_ms(1000);
switch (DispCounter) {
case 1: Disp_01();
break;
case 2: Disp_02();
break;
case 3: Disp_03();
break;
case 4: Disp_04();
break;
case 5: Disp_05();
break;
case 6: Disp_06();
break;
case 7: Disp_07();
break;
case 8: Disp_08();
break;
case 9: Disp_09();
break;
case 10: DispCounter = 0;
Disp_00();
break;
}
}
return (0);
}
//Display functions
Disp_00() {
LATCbits.LATC0 = 1; //Segment a
LATCbits.LATC1 = 1; //Segment b
LATCbits.LATC2 = 1; //Segment c
LATBbits.LATB4 = 1;
LATCbits.LATC4 = 1; //segment e
LATCbits.LATC5 = 1; //Segment f
LATBbits.LATB5 = 0; //segment g
}
Disp_01() {
LATCbits.LATC0 = 0; //Segment a
LATCbits.LATC1 = 1; //Segment b
LATCbits.LATC2 = 1; //Segment c
LATBbits.LATB4 = 0;
LATCbits.LATC4 = 0; //segment e
LATCbits.LATC5 = 0; //Segment f
LATBbits.LATB5 = 0; //segment g
}
Disp_02() {
LATCbits.LATC0 = 1; //Segment a
LATCbits.LATC1 = 1; //Segment b
LATCbits.LATC2 = 0; //Segment c
LATBbits.LATB4 = 1;
LATCbits.LATC4 = 1; //segment e
LATCbits.LATC5 = 0; //Segment f
LATBbits.LATB5 = 1; //segment g
}
Disp_03() {
LATCbits.LATC0 = 1; //Segment a
LATCbits.LATC1 = 1; //Segment b
LATCbits.LATC2 = 1; //Segment c
LATBbits.LATB4 = 1;
LATCbits.LATC4 = 0; //segment e
LATCbits.LATC5 = 0; //Segment f
LATBbits.LATB5 = 1; //segment g
}
Disp_04() {
LATCbits.LATC0 = 0; //Segment a
LATCbits.LATC1 = 1; //Segment b
LATCbits.LATC2 = 1; //Segment c
LATBbits.LATB4 = 0;
LATCbits.LATC4 = 0; //segment e
LATCbits.LATC5 = 1; //Segment f
LATBbits.LATB5 = 1; //segment g
}
Disp_05() {
LATCbits.LATC0 = 1; //Segment a
LATCbits.LATC1 = 0; //Segment b
LATCbits.LATC2 = 1; //Segment c
LATBbits.LATB4 = 1;
LATCbits.LATC4 = 0; //segment e
LATCbits.LATC5 = 1; //Segment f
LATBbits.LATB5 = 1; //segment g
}
Disp_06() {
LATCbits.LATC0 = 1; //Segment a
LATCbits.LATC1 = 0; //Segment b
LATCbits.LATC2 = 1; //Segment c
LATBbits.LATB4 = 1;
LATCbits.LATC4 = 1; //segment e
LATCbits.LATC5 = 1; //Segment f
LATBbits.LATB5 = 1; //segment g
}
Disp_07() {
LATCbits.LATC0 = 1; //Segment a
LATCbits.LATC1 = 1; //Segment b
LATCbits.LATC2 = 1; //Segment c
LATBbits.LATB4 = 0;
LATCbits.LATC4 = 0; //segment e
LATCbits.LATC5 = 1; //Segment f
LATBbits.LATB5 = 0; //segment g
}
Disp_08() {
LATCbits.LATC0 = 1; //Segment a
LATCbits.LATC1 = 1; //Segment b
LATCbits.LATC2 = 1; //Segment c
LATBbits.LATB4 = 1;
LATCbits.LATC4 = 1; //segment e
LATCbits.LATC5 = 1; //Segment f
LATBbits.LATB5 = 1; //segment g
}
Disp_09() {
LATCbits.LATC0 = 1; //Segment a
LATCbits.LATC1 = 1; //Segment b
LATCbits.LATC2 = 1; //Segment c
LATBbits.LATB4 = 1;
LATCbits.LATC4 = 0; //segment e
LATCbits.LATC5 = 1; //Segment f
LATBbits.LATB5 = 1; //segment g
}
